Pole placement based design of PIDC controller under constraint on robustness

Abstract

This paper presents an effective design method of PID controller with series differential compensator ie. PIDC controller. The adjustable parameters of a PIDC controller are: proportional gain kp, integral gain ki, derivative gain kd, the second order derivative gain kh and filter time constant Tf. The proposed design procedure is based on pole placement to approximately obtain dynamics of the closed loop system defined with the poles of the criterion test function which has optimal performance in sense of minimal settling time without overshoot. The design goal is to obtain good load disturbance response with constraint on robustness, so parameter kp is selected to guarantee desired robustness given in the form of closed loop maximum sensitivity Ms and considering sensitivity to the measurement noise Mn. This technique is applicable to a wide range of transfer functions: stable and unstable, with and without time-delay, rational and non-rational and those describing distributed parameters. Validity of a proposed method is verified through a series of numerical simulations of processes typically encountered in industry.