The Significant Bits Propagation Model in Fault-Tolerant System Design
Abstract
With current VLSI technology approaching the scale of individual atoms, and nanotechnology fabrication processes such as self-assembly, the resulting structures become less predictable and less prone to fabrication defects. Fortunately, there are a lot of technical applications that doesn't require 100% correctness of the output. This fact can be used to increase the fabrication yield and reduce unnecessary hardware overhead. For example, in some DSP applications such as audio or video processing, correctness of the operation can be defined as a threshold up to which a user will not notice the error. The threshold is usually measured as a quantity of correct information in the output, i.e. the number of significant digits. In this paper we propose a novel technique for mathematical modeling of significant digits propagation under the presence of errors. The model incorporates Euclidean metric, and it can be used to obtain the difference in the number of significant digits between any t...wo given intermediate results within the system. The information about loss of significant digits, due to the propagation of error through the architecture, will be used to design a partially fault tolerant system. The model is based on Min-Plus algebra, which is chosen to formalize structural dependencies. The evaluation of the proposed model is performed on the example of semi-systolic bit-plane array for FIR filtering, with error defined by Euclidean metric. It is shown that proposed model leads to the significant reduction of unavoidable fault-tolerant hardware overhead.
Keywords:
Tropical algebra / FIR filter design / Fault-tolerant systems / Error propagationSource:
Romanian Journal of Information Science and Technology, 2017, 20, 2, 161-176Publisher:
- Editura Academiei Romane
Funding / projects:
- Integrated intelligent system for physiotherapy - I2SP (RS-MESTD-Technological Development (TD or TR)-32012)
Collections
Institution/Community
Mašinski fakultetTY - JOUR AU - Cirić, Vladimir AU - Milentijević, Ivan AU - Cvetković, Aleksandar PY - 2017 UR - https://machinery.mas.bg.ac.rs/handle/123456789/2738 AB - With current VLSI technology approaching the scale of individual atoms, and nanotechnology fabrication processes such as self-assembly, the resulting structures become less predictable and less prone to fabrication defects. Fortunately, there are a lot of technical applications that doesn't require 100% correctness of the output. This fact can be used to increase the fabrication yield and reduce unnecessary hardware overhead. For example, in some DSP applications such as audio or video processing, correctness of the operation can be defined as a threshold up to which a user will not notice the error. The threshold is usually measured as a quantity of correct information in the output, i.e. the number of significant digits. In this paper we propose a novel technique for mathematical modeling of significant digits propagation under the presence of errors. The model incorporates Euclidean metric, and it can be used to obtain the difference in the number of significant digits between any two given intermediate results within the system. The information about loss of significant digits, due to the propagation of error through the architecture, will be used to design a partially fault tolerant system. The model is based on Min-Plus algebra, which is chosen to formalize structural dependencies. The evaluation of the proposed model is performed on the example of semi-systolic bit-plane array for FIR filtering, with error defined by Euclidean metric. It is shown that proposed model leads to the significant reduction of unavoidable fault-tolerant hardware overhead. PB - Editura Academiei Romane T2 - Romanian Journal of Information Science and Technology T1 - The Significant Bits Propagation Model in Fault-Tolerant System Design EP - 176 IS - 2 SP - 161 VL - 20 UR - https://hdl.handle.net/21.15107/rcub_machinery_2738 ER -
@article{ author = "Cirić, Vladimir and Milentijević, Ivan and Cvetković, Aleksandar", year = "2017", abstract = "With current VLSI technology approaching the scale of individual atoms, and nanotechnology fabrication processes such as self-assembly, the resulting structures become less predictable and less prone to fabrication defects. Fortunately, there are a lot of technical applications that doesn't require 100% correctness of the output. This fact can be used to increase the fabrication yield and reduce unnecessary hardware overhead. For example, in some DSP applications such as audio or video processing, correctness of the operation can be defined as a threshold up to which a user will not notice the error. The threshold is usually measured as a quantity of correct information in the output, i.e. the number of significant digits. In this paper we propose a novel technique for mathematical modeling of significant digits propagation under the presence of errors. The model incorporates Euclidean metric, and it can be used to obtain the difference in the number of significant digits between any two given intermediate results within the system. The information about loss of significant digits, due to the propagation of error through the architecture, will be used to design a partially fault tolerant system. The model is based on Min-Plus algebra, which is chosen to formalize structural dependencies. The evaluation of the proposed model is performed on the example of semi-systolic bit-plane array for FIR filtering, with error defined by Euclidean metric. It is shown that proposed model leads to the significant reduction of unavoidable fault-tolerant hardware overhead.", publisher = "Editura Academiei Romane", journal = "Romanian Journal of Information Science and Technology", title = "The Significant Bits Propagation Model in Fault-Tolerant System Design", pages = "176-161", number = "2", volume = "20", url = "https://hdl.handle.net/21.15107/rcub_machinery_2738" }
Cirić, V., Milentijević, I.,& Cvetković, A.. (2017). The Significant Bits Propagation Model in Fault-Tolerant System Design. in Romanian Journal of Information Science and Technology Editura Academiei Romane., 20(2), 161-176. https://hdl.handle.net/21.15107/rcub_machinery_2738
Cirić V, Milentijević I, Cvetković A. The Significant Bits Propagation Model in Fault-Tolerant System Design. in Romanian Journal of Information Science and Technology. 2017;20(2):161-176. https://hdl.handle.net/21.15107/rcub_machinery_2738 .
Cirić, Vladimir, Milentijević, Ivan, Cvetković, Aleksandar, "The Significant Bits Propagation Model in Fault-Tolerant System Design" in Romanian Journal of Information Science and Technology, 20, no. 2 (2017):161-176, https://hdl.handle.net/21.15107/rcub_machinery_2738 .